Design Verification Intern
3 нед. назад
СШАTraineeOnsite
test planningdebuggingverification methodologiesdocumentation
Internship role supporting design verification of next-generation processor architecture for edge AI supercomputer technology.
Обязанности
- This is a chance to get hands-on experience verifying a next-generation processor architecture, working directly alongside our hardware team as we build supercomputer technology for the Edge.
- You'll support the Design Verification team in documenting test plans, writing and debugging tests, and generating coverage for 's GPNPU — gaining exposure to real verification methodologies used on CPU and GPU-class designs, and working closely with the architects and designers who built them.
- Note: Our preference is for this internship to be based out of our Burlingame, California office. Candidates should be based in the Bay Area or able to relocate for the internship period and available to work on site.
- Support Verification Planning
- Collaborate with architects and designers to document test plans for the GPNPU.
- Write & Debug Tests
- Write and debug tests against the processor's architecture and micro-architecture.
- Generate and analyze coverage to help assess verification completeness.
- Collaborate Across the Team
- Work closely with hardware architects and designers to understand design intent and clarify verification requirements.
- Communicate findings, blockers, and technical questions clearly to the team.
- Within your internship, you'll:
- Build a working understanding of verification methodology for a CPU/GPU-class design.
- Contribute test plans, tests, and coverage that meaningfully support the team's verification effort.
- Develop hands-on fluency with SystemVerilog, SystemC, or C/C++ in a real verification environment.
Будет плюсом
- Coursework or project experience with computer architecture, RTL design, ML systems, or performance engineering.
- Exposure to assembly or low-level code generation.
- Adept with scripting languages like Python and using LLMs to get things done.
Условия
- The hourly salary range for this temporary position is $50-57/hr . This range reflects the full span of levels and geographies at which hires for this role. The actual hourly salary offered will depend on a number of factors, including the specific level of the role, years and depth of relevant experience, technical skills and competencies.
- interns receive hands-on experience working alongside industry experts in AI and semiconductor technology, with access to mentorship and meaningful project ownership from day one along with following
- Catered lunch each day in our office
- Downtown Burlingame office location, close to shops, cafes, and local amenities
- A work culture focused on innovative disruption
- If this role resonates with you, we encourage you to apply even if your experience does not perfectly match every qualification. We value potential, curiosity, and a willingness to learn just as much as direct experience.
Другое
- is redefining edge AI with the industry's first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture. Our technology powers intelligent edge devices across automotive, industrial, robotics, and embedded systems.
- Founded in 2016 and based in downtown Burlingame, California, is building the world's first supercomputer designed for the real-time needs of edge devices. aims to empower developers in every industry with superpowers to create tomorrow's technology, today. The company was co-founded by technologists from MIT and Carnegie Mellon, who were previously the technical co-founders of the Bitcoin computing company 21.
- Currently pursuing a Bachelor's, Master's, or PhD in Computer Science, Electrical Engineering, or a related field.
- Familiarity with verification methodologies for CPU or GPU designs.
- Proficient in either SystemVerilog, SystemC, or C/C++ (UVM is a plus).
- Prepared to collaborate with architects and designers to document test plans, write and debug tests, and generate coverage.
- Demonstrated capability in problem-solving, debugging, and clear technical communication.
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